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| 2SJ551(L), 2SJ551(S) Silicon P Channel MOS FET REJ03G0898-0400 (Previous: ADE-208-647B) Rev.4.00 Sep 07, 2005 Description High speed power switching Features * Low on-resistance RDS (on) = 0.050 typ. * Low drive current. * 4 V gate drive devices. * High speed switching. Outline RENESAS Package code: PRSS0004AE-A (Package name: LDPAK (L) ) 4 4 1. Gate 2. Drain 3. Source 4. Drain RENESAS Package code: PRSS0004AE-B (Package name: LDPAK (S)-(1) ) D G 1 1 2 3 S 2 3 Rev.4.00 Sep 07, 2005 page 1 of 8 2SJ551(L), 2SJ551(S) Absolute Maximum Ratings (Ta = 25C) Item Drain to source voltage Gate to source voltage Drain current Drain peak current Body to drain diode reverse drain current Avalanche current Avalanche energy Channel dissipation Channel temperature Storage temperature Notes: 1. PW 10 s, duty cycle 1% 2. Value at Tc = 25C 3. Value at Tch = 25C, Rg 50 Symbol VDSS VGSS ID ID (pulse) IDR Note 1 Value -60 20 -18 -72 -18 -18 27 60 150 -55 to +150 Unit V V A A A A mJ W C C IAP Note 3 EAR Pch Tch Note 2 Note 3 Tstg Electrical Characteristics (Ta = 25C) Item Drain to source breakdown voltage Gate to source breakdown voltage Zero gate voltage drain current Gate to source leak current Gate to source cutoff voltage Static drain to source on state resistance Forward transfer admittance Input capacitance Output capacitance Reverse transfer capacitance Turn-on delay time Rise time Turn-off delay time Fall time Body to drain diode forward voltage Body to drain diode reverse recovery time Note: 4. Pulse test Symbol V (BR) DSS V (BR) GSS IDSS IGSS VGS (off) RDS (on) RDS (on) |yfs| Ciss Coss Crss td (on) tr td (off) tf VDF trr Min -60 20 -- -- -1.0 -- -- 10 -- -- -- -- -- -- -- -- -- Typ -- -- -- -- -- 0.050 0.070 16 1300 650 180 14 95 190 135 -1.0 70 Max -- -- -10 10 -2.0 0.065 0.110 -- -- -- -- -- -- -- -- -- -- Unit V V A A V S pF pF pF ns ns ns ns V ns Test Conditions ID = -10 mA, VGS = 0 IG = 100 A, VDS = 0 VDS = -60 V, VGS = 0 VGS = 16 V, VDS = 0 ID = -1 mA, VDS = -10 V Note 4 ID = -9 A, VGS = -10 V ID = -9 A, VGS = -4 V Note 4 ID = -9 A, VDS = -10 V VDS = -10 V VGS = 0 f = 1 MHz VGS = -10 V ID = -9 A RL = 3.33 IF = -18 A, VGS = 0 IF = -18 A, VGS = 0 diF/dt = 50 A/s Note 4 Rev.4.00 Sep 07, 2005 page 2 of 8 2SJ551(L), 2SJ551(S) Main Characteristics Power vs. Temperature Derating 80 1000 300 Maximum Safe Operation Area Pch (W) ID (A) 60 100 30 10 3 1 0.3 PW 1 10 s 0 =1 ms s 0m Op s( era 1s tio ho n( t) Tc Operation in =2 5 this area is C) limited by RDS (on) 10 Channel Dissipation 40 20 Drain Current DC Ta = 25C 0 0 50 100 150 200 0.1 0.1 0.3 1 3 10 30 100 Case Temperature Tc (C) Drain to Source Voltage VDS (V) Typical Output Characteristics -20 -10 V -6 V -4 V -3.5 V -20 Pulse Test -3 V Typical Transfer Characteristics VDS = -10 V Pulse Test ID (A) -16 ID (A) Drain Current -16 -12 -12 Drain Current -8 -2.5 V -4 VGS = -2 V 0 0 -2 -4 -6 -8 -10 -8 25C -4 Tc = 75C -25C 0 0 -1 -2 -3 -4 -5 Drain to Source Voltage VDS (V) Gate to Source Voltage VGS (V) Drain to Source Saturation Voltage VDS (on) (V) Drain to Source Saturation Voltage vs. Gate to Source Voltage -3.0 Pulse Test -2.5 -2.0 -1.5 -1.0 -0.5 0 0 -4 -8 -12 -16 -20 ID = -20 A -10 A -5 A Static Drain to Source on State Resistance vs. Drain Current Static Drain to Source on State Resistance RDS (on) () 1 Pulse Test 0.5 0.2 0.1 0.05 -10 V 0.02 0.01 -1 VGS = -4 V -2 -5 -10 -20 -50 -100 Gate to Source Voltage VGS (V) Drain Current ID (A) Rev.4.00 Sep 07, 2005 page 3 of 8 2SJ551(L), 2SJ551(S) Static Drain to Source on State Resistance vs. Temperature Forward Transfer Admittance |yfs| (S) Static Drain to Source on State Resistance RDS (on) () 0.30 Pulse Test 0.25 0.20 -5 A, -10 A 0.15 0.10 0.05 -10 V 0 -40 0 40 80 120 160 VGS = -4 V ID = -20 A 100 30 Tc = -25C 10 25C 3 75C 1 0.3 0.1 -0.1 Forward Transfer Admittance vs. Drain Current -5 A, -10 A, -20 A VDS = -10 V Pulse Test -0.3 -1 -3 -10 -30 -100 Case Temperature Tc (C) Drain Current ID (A) Typical Capacitance vs. Drain to Source Voltage 10000 3000 Body-Drain Diode Reverse Recovery Time 100 Reverse Recovery Time trr (ns) Capacitance C (pF) 50 Ciss 1000 300 100 30 10 Coss 20 di / dt = 50 A / s VGS = 0, Ta = 25C 10 -0.1 -0.2 -0.5 -1 -2 -5 -10 -20 Crss VGS = 0 f = 1 MHz 0 -10 -20 -30 -40 -50 Reverse Drain Current IDR (A) Drain to Source Voltage VDS (V) Dynamic Input Characteristics VDS (V) VDD = -10 V -25 V -50 V Switching Characteristics VGS (V) 0 1000 500 VGS = -10 V, VDD = -30 V PW = 5 s, duty 1 % td(off) 200 tf 100 50 tr td(on) -0.5 -1 -2 -5 -10 -20 0 -20 -4 Drain to Source Voltage -40 VDS -60 VDD = -50 V -25 V -10 V ID = -18 A 0 16 32 VGS -8 -12 -80 -16 Gate to Source Voltage Switching Time t (ns) 20 10 -0.1 -0.2 -100 48 64 -20 80 Gate Charge Qg (nc) Drain Current ID (A) Rev.4.00 Sep 07, 2005 page 4 of 8 2SJ551(L), 2SJ551(S) Reverse Drain Current vs. Source to Drain Voltage -20 Maximum Avalanche Energy vs. Channel Temperature Derating Repetitive Avalanche Energy EAR (mJ) 50 IAP = -18 A VDD = -25 V duty < 0.1 % Rg 50 Reverse Drain Current IDR (A) -16 -10 V -12 -5 V -8 VGS = 0, 5 V 40 30 20 -4 Pulse Test 0 0 -0.4 -0.8 -1.2 -1.6 -2.0 10 0 25 50 75 100 125 150 Source to Drain Voltage VSD (V) Channel Temperature Tch (C) Normalized Transient Thermal Impedance vs. Pulse Width Normalized Transient Thermal Impedance s (t) 3 Tc = 25C 1 D=1 0.5 0.3 0.2 0.1 0.1 0.05 ch - c (t) = s (t) * ch - c ch - c = 2.08C/W, Tc = 25C PDM pu ls e 0.02 0.03 0.0 1s D= PW T PW T 1 t ho 0.01 10 100 1m 10 m 100 m 1 10 Pulse Width PW (S) Avalanche Test Circuit Avalanche Waveform 1 * L * IAP2 * 2 VDSS VDSS - VDD V(BR)DSS IAP VDD ID VDS VDS Monitor L IAP Monitor EAR = Rg D.U.T Vin -15 V 50 VDD 0 Rev.4.00 Sep 07, 2005 page 5 of 8 2SJ551(L), 2SJ551(S) Switching Time Test Circuit Vin Vin Monitor D.U.T. RL 90% Vin -10 V 50 VDD = -30 V Vout td(on) 10% tr td(off) 10% tf 90% 90% Vout Monitor 10% Waveform Rev.4.00 Sep 07, 2005 page 6 of 8 2SJ551(L), 2SJ551(S) Package Dimensions JEITA Package Code RENESAS Code PRSS0004AE-A Package Name LDPAK(L) / LDPAK(L)V MASS[Typ.] 1.40g Unit: mm (1.4) 4.44 0.2 10.2 0.3 1.3 0.15 11.3 0.5 0.3 10.0 + 0.5 - 8.6 0.3 1.3 0.2 1.37 0.2 0.76 0.1 2.54 0.5 2.54 0.5 11.0 0.5 0.2 0.86 + 0.1 - 2.49 0.2 0.4 0.1 JEITA Package Code SC-83 RENESAS Code PRSS0004AE-B Package Name LDPAK(S)-(1) / LDPAK(S)-(1)V MASS[Typ.] 1.30g Unit: mm 4.44 0.2 10.2 0.3 (1.4) 8.6 0.3 + 0.3 - 0.5 10.0 (1.5) (1.5) 2.49 0.2 0.2 0.1 + 0.1 - 7.8 7.0 2.2 1.37 0.2 1.3 0.2 2.54 0.5 0.3 3.0 + 0.5 - 0.2 0.86 + 0.1 - 0.4 0.1 2.54 0.5 Rev.4.00 Sep 07, 2005 page 7 of 8 1.7 1.3 0.15 7.8 6.6 2SJ551(L), 2SJ551(S) Ordering Information Part Name 2SJ551L-E 2SJ551STL-E 500 pcs 1000 pcs Quantity Box (Sack) Taping Shipping Container Note: For some grades, production may be terminated. Please contact the Renesas sales office to check the state of production before ordering the product. Rev.4.00 Sep 07, 2005 page 8 of 8 Sales Strategic Planning Div. Keep safety first in your circuit designs! Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. These materials are intended as a reference to assist our customers in the selection of the Renesas Technology Corp. product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to Renesas Technology Corp. or a third party. 2. Renesas Technology Corp. assumes no responsibility for any damage, or infringement of any third-party's rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in these materials. 3. All information contained in these materials, including product data, diagrams, charts, programs and algorithms represents information on products at the time of publication of these materials, and are subject to change by Renesas Technology Corp. without notice due to product improvements or other reasons. It is therefore recommended that customers contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor for the latest product information before purchasing a product listed herein. The information described here may contain technical inaccuracies or typographical errors. Renesas Technology Corp. assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies or errors. Please also pay attention to information published by Renesas Technology Corp. by various means, including the Renesas Technology Corp. Semiconductor home page (http://www.renesas.com). 4. When using any or all of the information contained in these materials, including product data, diagrams, charts, programs, and algorithms, please be sure to evaluate all information as a total system before making a final decision on the applicability of the information and products. Renesas Technology Corp. assumes no responsibility for any damage, liability or other loss resulting from the information contained herein. 5. Renesas Technology Corp. semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life is potentially at stake. Please contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerospace, nuclear, or undersea repeater use. 6. The prior written approval of Renesas Technology Corp. is necessary to reprint or reproduce in whole or in part these materials. 7. If these products or technologies are subject to the Japanese export control restrictions, they must be exported under a license from the Japanese government and cannot be imported into a country other than the approved destination. Any diversion or reexport contrary to the export control laws and regulations of Japan and/or the country of destination is prohibited. 8. Please contact Renesas Technology Corp. for further details on these materials or the products contained therein. RENESAS SALES OFFICES Refer to "http://www.renesas.com/en/network" for the latest and detailed information. Renesas Technology America, Inc. 450 Holger Way, San Jose, CA 95134-1368, U.S.A Tel: <1> (408) 382-7500, Fax: <1> (408) 382-7501 Renesas Technology Europe Limited Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, U.K. Tel: <44> (1628) 585-100, Fax: <44> (1628) 585-900 Renesas Technology Hong Kong Ltd. 7th Floor, North Tower, World Finance Centre, Harbour City, 1 Canton Road, Tsimshatsui, Kowloon, Hong Kong Tel: <852> 2265-6688, Fax: <852> 2730-6071 Renesas Technology Taiwan Co., Ltd. 10th Floor, No.99, Fushing North Road, Taipei, Taiwan Tel: <886> (2) 2715-2888, Fax: <886> (2) 2713-2999 Renesas Technology (Shanghai) Co., Ltd. Unit2607 Ruijing Building, No.205 Maoming Road (S), Shanghai 200020, China Tel: <86> (21) 6472-1001, Fax: <86> (21) 6415-2952 Renesas Technology Singapore Pte. Ltd. 1 Harbour Front Avenue, #06-10, Keppel Bay Tower, Singapore 098632 Tel: <65> 6213-0200, Fax: <65> 6278-8001 Renesas Technology Korea Co., Ltd. Kukje Center Bldg. 18th Fl., 191, 2-ka, Hangang-ro, Yongsan-ku, Seoul 140-702, Korea Tel: <82> 2-796-3115, Fax: <82> 2-796-2145 http://www.renesas.com Renesas Technology Malaysia Sdn. Bhd. Unit 906, Block B, Menara Amcorp, Amcorp Trade Centre, No.18, Jalan Persiaran Barat, 46050 Petaling Jaya, Selangor Darul Ehsan, Malaysia Tel: <603> 7955-9390, Fax: <603> 7955-9510 (c) 2005. Renesas Technology Corp., All rights reserved. Printed in Japan. Colophon .3.0 |
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